1. Field of the Invention
The present invention relates to a capacitor of a semiconductor device and a method of fabricating the same.
2. Description of the Related Art
A semiconductor integrated circuit includes active devices, such as diodes and transistors, and passive devices, such as capacitors, resistors and inductors.
Recently, studies and research are being pursued in the field of semiconductor devices in order to provide a method of fabricating passive devices as well as active devices. In particular, studies are being steadily performed in relation to a method of forming a capacitor or a resistor.
The capacitor reduces a level-shift voltage and stably maintains a voltage in the turn-off period of a thin film transistor. As the semiconductor devices become more highly integrated, high-capacity capacitors are also available.
In such a capacitor, an insulating layer is formed between top and bottom electrodes that face each other. In order to increase the capacitance of the capacitor, and thus obtain a high-capacity capacitor, it is preferable to enlarge the areas of the top and bottom electrodes of the capacitor while reducing the thickness of the insulating layer.
Hereinafter, a capacitor of a semiconductor device and a method of fabricating the same according to the related art will be described with reference to accompanying drawings.
FIG. 1 is a sectional view illustrating the capacitor of the semiconductor device according to the related art.
As shown in FIG. 1, capacitor bottom electrode layers 12 and 13 are formed on a semiconductor substrate 11 with predetermined thickness, and a low-dielectric insulating layer 14 is stacked on the capacitor bottom electrode 13. In addition, a capacitor top electrode 15 is formed on the low-dielectric insulating layer 14 such that the top electrode 15 faces the capacitor bottom electrodes 12 and 13.
Although doped polysilicon can be used to fabricate the capacitor top and bottom electrodes, metallic materials are generally used to fabricate high-capacity capacitors.
In order to form the capacitor having the above structure, a metallic material is deposited on the semiconductor substrate, and then the metallic material is patterned through a photolithography process, thereby forming the capacitor bottom electrode layers 12 and 13.
The capacitor bottom electrode layers 12 and 13 can be prepared in the form of a single layer or a dual layer. FIG. 1 shows the capacitor bottom electrode layers 12 and 13 having the dual layer structure.
In addition, the low-dielectric insulating layer 14 is formed on the entire surface of the resultant structure including the capacitor bottom electrode layers 12 and 13, and then the low-dielectric insulating layer 14 is patterned through an etching process. During the etching process for the low-dielectric insulating layer 14, the capacitor bottom electrode layers 12 and 13 can be at least partially etched together with the low-dielectric insulating layer 14. In this case, particles of the capacitor bottom electrode layers 12 and 13 may be re-deposited onto lateral sides of the insulating layer 14.
Finally, a metallic material is deposited on the entire surface of the resultant structure including the insulating layer 14, and then the metallic material is patterned through a photolithography process, thereby forming the capacitor top electrode 15. At this time, the patterning process for the capacitor top electrode 15 should not cause a short circuit between the capacitor top electrode 15 and the capacitor bottom electrode layers 12 and 13.
However, the capacitor of the semiconductor device and the method of fabricating the same according to the related art exhibit following problems.
First, although the area of the capacitor top and bottom electrodes must be enlarged in order to obtained the high-capacity capacitor, it may increase the area of the capacitor, so there are limitations in the integration capability of the capacitors in advanced processes for manufacturing semiconductor devices.
In addition, the thickness of the insulating layer must be reduced in order to obtain the high-capacity capacitor. However, in this case, the capacitor bottom electrode layers may also be etched during the etching process for the insulating layer, so that particles of the bottom electrodes may be re-deposited onto the lateral sides of the insulating layer. Such particles may cause the short circuit between the capacitor top electrode and the capacitor bottom electrodes in the process of forming the capacitor top electrode, and the likelihood of such a short circuit increases as the thickness of the insulating layer decreases.
Further, in the electrode structure of a conventional MIM (metal-insulator-metal) capacitor, fringe capacity may exist between the capacitor top electrode and the capacitor bottom electrodes. Such fringe capacity may degrade the capacitor characteristics.